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/illumos-gate/usr/src/uts/common/io/nxge/
H A Dnxge_intr.cdiff 48056c53 Wed May 27 02:21:24 UTC 2009 Michael Speer <Michael.Speer@Sun.COM> 6757414 nxge has needless _accept_jumbo argument
6841289 memory leaks in nxge driver when running create and destroy HIO loop
6844074 nxge might still pass up packets while in polling mode
6840217 Bandwidth of PCI Express on x64 is limited because nxge sets MPS and MRRS to 128
H A Dnxge_hio_guest.cdiff 48056c53 Wed May 27 02:21:24 UTC 2009 Michael Speer <Michael.Speer@Sun.COM> 6757414 nxge has needless _accept_jumbo argument
6841289 memory leaks in nxge driver when running create and destroy HIO loop
6844074 nxge might still pass up packets while in polling mode
6840217 Bandwidth of PCI Express on x64 is limited because nxge sets MPS and MRRS to 128
H A Dnxge_hio.cdiff 48056c53 Wed May 27 02:21:24 UTC 2009 Michael Speer <Michael.Speer@Sun.COM> 6757414 nxge has needless _accept_jumbo argument
6841289 memory leaks in nxge driver when running create and destroy HIO loop
6844074 nxge might still pass up packets while in polling mode
6840217 Bandwidth of PCI Express on x64 is limited because nxge sets MPS and MRRS to 128
H A Dnxge.confdiff 48056c53 Wed May 27 02:21:24 UTC 2009 Michael Speer <Michael.Speer@Sun.COM> 6757414 nxge has needless _accept_jumbo argument
6841289 memory leaks in nxge driver when running create and destroy HIO loop
6844074 nxge might still pass up packets while in polling mode
6840217 Bandwidth of PCI Express on x64 is limited because nxge sets MPS and MRRS to 128
H A Dnxge_hw.cdiff 48056c53 Wed May 27 02:21:24 UTC 2009 Michael Speer <Michael.Speer@Sun.COM> 6757414 nxge has needless _accept_jumbo argument
6841289 memory leaks in nxge driver when running create and destroy HIO loop
6844074 nxge might still pass up packets while in polling mode
6840217 Bandwidth of PCI Express on x64 is limited because nxge sets MPS and MRRS to 128
H A Dnxge_ndd.cdiff 48056c53 Wed May 27 02:21:24 UTC 2009 Michael Speer <Michael.Speer@Sun.COM> 6757414 nxge has needless _accept_jumbo argument
6841289 memory leaks in nxge driver when running create and destroy HIO loop
6844074 nxge might still pass up packets while in polling mode
6840217 Bandwidth of PCI Express on x64 is limited because nxge sets MPS and MRRS to 128
H A Dnxge_txdma.cdiff 48056c53 Wed May 27 02:21:24 UTC 2009 Michael Speer <Michael.Speer@Sun.COM> 6757414 nxge has needless _accept_jumbo argument
6841289 memory leaks in nxge driver when running create and destroy HIO loop
6844074 nxge might still pass up packets while in polling mode
6840217 Bandwidth of PCI Express on x64 is limited because nxge sets MPS and MRRS to 128
H A Dnxge_send.cdiff 48056c53 Wed May 27 02:21:24 UTC 2009 Michael Speer <Michael.Speer@Sun.COM> 6757414 nxge has needless _accept_jumbo argument
6841289 memory leaks in nxge driver when running create and destroy HIO loop
6844074 nxge might still pass up packets while in polling mode
6840217 Bandwidth of PCI Express on x64 is limited because nxge sets MPS and MRRS to 128
H A Dnxge_mac.cdiff 48056c53 Wed May 27 02:21:24 UTC 2009 Michael Speer <Michael.Speer@Sun.COM> 6757414 nxge has needless _accept_jumbo argument
6841289 memory leaks in nxge driver when running create and destroy HIO loop
6844074 nxge might still pass up packets while in polling mode
6840217 Bandwidth of PCI Express on x64 is limited because nxge sets MPS and MRRS to 128
H A Dnxge_rxdma.cdiff 48056c53 Wed May 27 02:21:24 UTC 2009 Michael Speer <Michael.Speer@Sun.COM> 6757414 nxge has needless _accept_jumbo argument
6841289 memory leaks in nxge driver when running create and destroy HIO loop
6844074 nxge might still pass up packets while in polling mode
6840217 Bandwidth of PCI Express on x64 is limited because nxge sets MPS and MRRS to 128
H A Dnxge_main.cdiff 48056c53 Wed May 27 02:21:24 UTC 2009 Michael Speer <Michael.Speer@Sun.COM> 6757414 nxge has needless _accept_jumbo argument
6841289 memory leaks in nxge driver when running create and destroy HIO loop
6844074 nxge might still pass up packets while in polling mode
6840217 Bandwidth of PCI Express on x64 is limited because nxge sets MPS and MRRS to 128
/illumos-gate/usr/src/uts/common/sys/nxge/
H A Dnxge.hdiff 48056c53 Wed May 27 02:21:24 UTC 2009 Michael Speer <Michael.Speer@Sun.COM> 6757414 nxge has needless _accept_jumbo argument
6841289 memory leaks in nxge driver when running create and destroy HIO loop
6844074 nxge might still pass up packets while in polling mode
6840217 Bandwidth of PCI Express on x64 is limited because nxge sets MPS and MRRS to 128